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 a
FEATURES 44 V Supply Maximum Rating V SS to VDD Analog Signal Range Single/Dual Supply Specifications Wide Supply Ranges (10.8 V to 16.5 V) Extended Plastic Temperature Range (-40 C to +85 C) Low Power Dissipation (28 mW max) Low Leakage (20 pA typ) Available in 28-Lead DIP, SOIC, PLCC, TSSOP and LCCC Packages Superior Alternative to: DG506A, Hl-506 DG507A, Hl-507
CMOS 8-/16-Channel Analog Multiplexers ADG506A/ADG507A
FUNCTIONAL BLOCK DIAGRAM
GENERAL DESCRIPTION
ORDERING GUIDE
The ADG506A and ADG507A are CMOS monolithic analog multiplexers with 16 channels and dual 8 channels, respectively. The ADG506A switches one of 16 inputs to a common output, depending on the state of four binary addresses and an enable input. The ADG507A switches one of eight differential inputs to a common differential output, depending on the state of three binary addresses and an enable input. Both devices have TTL and 5 V CMOS logic compatible digital inputs. The ADG506A and ADG507A are designed on an enhanced LC2MOS process, which gives an increased signal capability of VSS to VDD and enables operation over a wide range of supply voltages. The devices can operate comfortably anywhere in the 10.8 V to 16.5 V single or dual supply range. These multiplexers also feature high switching speeds and low RON.
PRODUCT HIGHLIGHTS
Model1 ADG506AKN ADG506AKR ADG506AKP ADG506ABQ ADG506ATQ ADG506ATE ADG507AKN ADG507AKR ADG507AKP ADG507AKRU ADG507ABQ ADG507ATQ ADG507ATE
Temperature Range -40C to +85C -40C to +85C -40C to +85C -40C to +85C -55C to +125C -55C to +125C -40C to +85C -40C to +85C -40C to +85C -40C to +85C -40C to +85C -55C to +125C -55C to +125C
Package Option2 N-28 R-28 P-28A Q-28 Q-28 E-28A N-28 R-28 P-28A RU-28 Q-28 Q-28 E-28A
1. Single/Dual Supply Specifications with a Wide Tolerance The devices are specified in the 10.8 V to 16.5 V range for both single and dual supplies. 2. Extended Signal Range The enhanced LC2MOS processing results in a high breakdown and an increased analog signal range of VSS to VDD. 3. Break-Before-Make Switching Switches are guaranteed break-before-make so input signals are protected against momentary shorting. 4. Low Leakage Leakage currents in the range of 20 pA make these multiplexers suitable for high precision circuits.
NOTES 1 To order MIL-STD-883, Class B processed parts, add /883B to part number. See Analog Devices' Military/Aerospace Reference Manual (1994) for military data sheet. 2 E = Leadless Ceramic Chip Carrier (LCCC); N = Plastic DIP; P = Plastic Leaded Chip Carrier (PLCC); Q = Cerdip; R = 0.3" Small Outline IC (SOIC); RU = Thin Shrink Small Outline Package (TSSOP).
REV. C
Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781/329-4700 World Wide Web Site: http://www.analog.com Fax: 781/326-8703 (c) Analog Devices, Inc., 1998
ADG506A/ADG507A-SPECIFICATIONS
Dual Supply (V
DD
= +10.8 V to +16.5 V, VSS = -10.8 V to -16.5 V unless otherwise noted)
ADG506A ADG506A ADG507A ADG507A K Version B Version -40 C to -40 C to +25 C +85 C +25 C +85 C VSS VDD 280 450 300 0.6 5 0.02 1 0.04 1 1 0.04 1 1 50 200 100 200 100 25 2.4 0.8 1 8 200 300 50 25 200 300 200 300 68 50 5 44 22 4 0.6 1.5 20 0.2 10 28 8 200 300 50 25 200 300 200 300 68 50 5 44 22 4 0.6 1.5 20 0.2 10 28 10 28 20 0.2 VSS VDD 600 400 VSS VDD 280 450 300 0.6 5 0.02 1 0.04 1 1 0.04 1 1 50 200 100 200 100 25 2.4 0.8 1 8 200 300 50 25 200 300 200 300 68 50 5 44 22 4 0.6 1.5 VSS VDD 600 400 ADG506A ADG507A T Version -55 C to +25 C +125 C VSS VDD 280 450 300 0.6 5 0.02 1 0.04 1 1 0.04 1 1 VSS VDD 600 400
Parameter ANALOG SWITCH Analog Signal Range RON
Units V min V max typ max max max %/C typ % typ nA typ nA max nA typ nA max nA max nA typ nA max nA max nA max V min V max A max pF max ns typ ns max ns typ ns min ns typ ns max ns typ ns max dB typ dB min pF typ pF typ pF typ pC typ
Comments
-10 V VS +10 V, IDS = 1 mA; Test Circuit 1 VDD = 15 V ( 10%), VSS = -15 V ( 10%) VDD = 15 V ( 5%), VSS = -15 V ( 5%) -10 V VS +10 V, IDS = 1 mA -10 V VS +10 V, IDS = 1 mA V1 = 10 V, V2 = V1 = 10 V, V2 = V1 = 10 V, V2 = 10 V; Test Circuit 2 10 V; Test Circuit 3 10 V; Test Circuit 4
RON Drift RON Match IS (OFF), Off Input Leakage ID (OFF), Off Output Leakage ADG506A ADG507A ID (ON), On Channel Leakage ADG506A ADG507A IDIFF, Differential Off Output Leakage (ADG507A Only) DIGITAL CONTROL VINH, Input High Voltage VINL, Input Low Voltage IINL or IINH CIN Digital Input Capacitance DYNAMIC CHARACTERISTICS tTRANSITION 1 tOPEN
1
50 200 100 200 100 25 2.4 0.8 1
V1 = 10 V, V2 =
10 V; Test Circuit 5
VIN = 0 to VDD
V1 = 10 V, V2 = +10 V; Test Circuit 6 Test Circuit 7 Test Circuit 8 Test Circuit 8 VEN = 0.8 V, RL = 1 k, CL = 15 pF, VS = 7 V rms, f = 100 kHz VEN = 0.8 V VEN = 0.8 V RS = 0 , VS = 0 V; Test Circuit 9
400 10 400 400
400 10 400 400
400 10 400 400
tON (EN)1 tOFF (EN)
1
OFF Isolation CS (OFF) CD (OFF) ADG506A ADG507A QINJ, Charge Injection POWER SUPPLY IDD ISS Power Dissipation
mA typ VIN = VINL or VlNH mA max A typ VIN = VIN or VINH mA max mW typ mW max
NOTES 1 Sample tested at +25C to ensure compliance. Specifications subject to change without notice.
-2-
REV. C
Single Supply (V
Parameter ANALOG SWITCH Analog Signal Range RON RON Drift RON Match
ADG506A/ADG507A
DD = +10.8 V to +16.5 V, VSS = GND = 0 V unless otherwise noted)
ADG506A ADG506A ADG507A ADG507A K Version B Version -40 C to -40 C to +25 C +85 C +25 C +85 C VSS VDD 500 700 0.6 5 0.02 1 0.04 1 1 0.04 1 1 VSS VDD 1000 VSS VDD 500 700 0.6 5 0.02 1 0.04 1 1 0.04 1 1 VSS VDD 1000
ADG506A ADG507A T Version -55 C to +25 C +125 C VSS VDD 500 700 0.6 5 0.02 1 0.04 1 1 0.04 1 1 VSS VDD 1000
Units
Comments
V min V max typ 0 V VS +10 V, IDS = 0.5 mA; Test Circuit 1 max %/C typ 0 V VS +10 V, IDS = 0.5 mA % typ 0 V VS +10 V, IDS = 0.5 mA nA typ nA max nA typ nA max nA max nA typ nA max nA max nA max V min V max A max pF max ns typ ns max ns typ ns min ns typ ns max ns typ ns max dB typ dB min pF typ pF typ pF typ pC typ V1 = +10 V/0 V, V2 = 0 V/ +10 V; Test Circuit 2 V1 = +10 V/0 V, V2 = 0 V/ +10 V; Test Circuit 3 V1 = +10 V/0 V, V2 = 0 V/ +10 V; Test Circuit 4 V1 = +10 V/0 V, V2 = 0 V/ +10 V; Test Circuit 5
IS (OFF), Off Input Leakage ID (OFF), Off Output Leakage ADG506A ADG507A ID (ON), On Channel Leakage ADG506A ADG507A IDIFF, Differential Off Output Leakage (ADG507A Only) DIGITAL CONTROL VINH, Input High Voltage VINL, Input Low Voltage IINL or IINH CIN Digital Input Capacitance DYNAMIC CHARACTERISTICS tTRANSITION 1 tOPEN
1
50 200 100 200 100 25 2.4 0.8 1
50 200 100 200 100 25 2.4 0.8 1
50 200 100 200 100 25 2.4 0.8 1
VIN = 0 to VDD
8 300 450 50 25 250 450 250 450 68 50 5 44 22 4 0.6 1.5 10 25
8 300 450 50 25 250 450 250 450 68 50 5 44 22 4 0.6 1.5 10 25
8 300 450 50 25 250 450 250 450 68 50 5 44 22 4 0.6 1.5 10 25
V1 = +10 V/0 V, V2 = +10 V; Test Circuit 6 Test Circuit 7 Test Circuit 8 Test Circuit 8 VEN = 0.8 V, RL = 1 k, CL = 15 pF, VS = 3.5 V rms, f = 100 kHz VEN = 0.8 V VEN = 0.8 V RS = 0 , VS = 0 V; Test Circuit 9
600 10 600 600
600 10 600 600
600 10 600 600
tON (EN)1 tOFF (EN)
1
OFF Isolation CS (OFF) CD (OFF) ADG506A ADG507A QINJ, Charge Injection POWER SUPPLY IDD Power Dissipation
mA typ VIN = VINL or VlNH mA max mW typ mW max
NOTES 1 Sample tested at +25C to ensure compliance. Specifications subject to change without notice.
Truth Table (ADG506A)
A3 X 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 A2 X 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 A1 X 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 A0 X 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 EN On Switch 0 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 NONE 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16
Truth Table (ADG507A)
A2 X 0 0 0 0 1 1 1 1 A1 X 0 0 1 1 0 0 1 1 A0 X 0 1 0 1 0 1 0 1 EN On Switch Pair 0 1 1 1 1 1 1 1 1 NONE 1 2 3 4 5 6 7 8
X = Don't Care
REV. C
-3-
ADG506A/ADG507A
ABSOLUTE MAXIMUM RATINGS 1
(TA = 25C unless otherwise noted)
VDD to VSS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44 V VDD to GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 V VSS to GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -25 V Analog Inputs2 Voltage at S, D . . . . . . . . . . . . . . . . . . . . . . . VSS - 2 V to VDD . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . + 2 V or . . . . . . . . . . . . . . . . . . . . . . 20 mA, Whichever Occurs First Continuous Current, S or D . . . . . . . . . . . . . . . . . . . . . 20 mA Pulsed Current S or D 1 ms Duration, 10% Duty Cycle . . . . . . . . . . . . . . . . 40 mA Digital Inputs2 Voltage at A, EN . . . . . . . . . . . . . . . . . . . . . . . . . . VSS - 4 V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . to VDD + 4 V or . . . . . . . . . . . . . . . . . . . . . . 20 mA, Whichever Occurs First
Power Dissipation (Any Package) Up to +75C . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 470 mW Derates above +75C by . . . . . . . . . . . . . . . . . . 6 mW/C Operating Temperature Commercial (K Version) . . . . . . . . . . . . . . -40C to +85C Industrial (B Version) . . . . . . . . . . . . . . . . -40C to +85C Extended (T Version) . . . . . . . . . . . . . . . -55C to +125C Storage Temperature Range . . . . . . . . . . . . -65C to +150C Lead Temperature (Soldering, 10 secs) . . . . . . . . . . . . +300C
NOTES 1 Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. 2 Overvoltage at A, EN, S or D will be clamped by diodes. Current should be limited to the Maximum Rating above.
CAUTION ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on the human body and test equipment and can discharge without detection. Although the ADG506A /ADG507A feature proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance degradation or loss of functionality. PIN CONFIGURATIONS DIP, SOIC LCCC
VDD 1 NC 2 NC 3 S16 4 S15 5 S14 6 28 D
WARNING!
ESD SENSITIVE DEVICE
PLCC
VSS VDD S16 NC NC VSS S8 D S8
25 S7 24 S6 23 S5 22 S4 21 S3 20 S2 19 S1 12 13 14 15 16 17 18
NC
NC
2
26 S8 25 S7 S6 ADG506A 24
4
3
1
28 27 26
D
27 VSS
VDD
S16
4
3
2
1
28 27 26
PIN 1 IDENTIFIER
S15 5 S14 6 S13 7 S12 8 S11 9 S10 10 S9 11
12 13 14 15 16 17 18
25 24
S7 S6 S5 S4 S3 S2 S1
S15 5 S14 6 S13 7 S12 8 S11 9 S10 10 S9 11
TOP VIEW 23 S5 S13 7 (Not to Scale) 22 S4 S12 8 S11 9 S10 10 S9 11 GND 12 NC 13 A3 14 21 S3 20 S2 19 S1 18 EN
ADG506A
TOP VIEW (Not to Scale)
23 22 21 20 19
ADG506A
TOP VIEW (Not to Scale)
NC
A3
A2
A1
A0
A3
A2
A1
16 A1 15 A2
GND
EN
17 A0
A0
NC = NO CONNECT
NC = NO CONNECT
GND
NC = NO CONNECT
DIP, SOIC, TSSOP LCCC
VDD 1 DB 2 NC 3 S8B 4 S7B 5 S6B 6 28 DA
VDD S8A
NC
PLCC
S8B DB NC DA S8A
25 S7A 24 S6A 23 S5A 22 S4A 21 S3A 20 S2A 19 S1A 12 13 14 15 16 17 18
VSS
VDD
26 S8A 25 S7A S6A ADG507A 24 S7B 5 S6B 6 S5B 7 S4B 8 S3B
9
4
3
2
1
28 27 26
4
25 24
3
2
1
28 27 26
PIN 1 IDENTIFIER
S7A S6A S5A S4A S3A S2A S1A
S7B 5 S6B 6 S5B 7 S4B 8 S3B 9 S2B 10 S1B 11
TOP VIEW 23 S5A S5B 7 (Not to Scale) 22 S4A S4B 8 S3B 9 S2B 10 S1B 11 GND 12 NC 13 NC 14 21 S3A 20 S2A 19 S1A 18 EN
ADG507A
TOP VIEW (Not to Scale)
23 22 21 20 19
ADG507A
TOP VIEW (Not to Scale)
S2B 10 S1B 11
12 13 14 15 16 17 18
NC
A2
A1
A0
A2
A1
A0
GND
NC
15 A2
NC = NO CONNECT
NC = NO CONNECT
NC = NO CONNECT
-4-
NC
EN
16 A1
GND
NC
EN
17 A0
VSS
NC
DB
DA
27 VSS
S8B
EN
REV. C
Typical Performance Characteristics-ADG506A/ADG507A
The multiplexers are guaranteed functional with reduced single or dual supplies down to 4.5 V.
Figure 1. RON as a Function of VD (VS): Dual Supply Voltage, TA = +25C
Figure 4. RON as a Function of VD (VS) Single Supply Voltage, TA = +25C
Figure 2. Leakage Current as a Function of Temperature (Note: Leakage Currents Reduce as the Supply Voltages Reduce)
Figure 5. Trigger Levels vs. Power Supply Voltage, Dual or Single Supply, TA = +25C
Figure 3. tTRANSITION vs. Supply Voltage: Dual and Single Supplies, TA = + 25C (Note: For VDD and /VSS / < 10 V; V1 = VDD /VSS, V2 = VSS /VDD. See Test Circuit 6)
Figure 6. IDD vs. Supply Voltage: Dual or Single Supply, TA = +25C
REV. C
-5-
ADG506A/ADG507A-Test Circuits
Note: All Digital Input Signal Rise and Fall Times Measured from 10% to 90% of 3 V. tR = tF = 20 ns.
Test Circuit 1. RON
Test Circuit 2. IS (OFF)
Test Circuit 3. ID (OFF)
Test Circuit 4. ID (ON)
Test Circuit 5. IDIFF
Test Circuit 6. Switching Time of Multiplexer, tTRANSITION
Test Circuit 7. Break-Before-Make Delay, tOPEN
-6-
REV. C
ADG506A/ADG507A
Test Circuit 8. Enable Delay, tON (EN), tOFF (EN)
Test Circuit 9. Charge Injection
SINGLE SUPPLY AUTOMOTIVE APPLICATION
The excellent performance of the multiplexers under single supply conditions makes the ADG506A/ADG507A suitable in applications such as automotive and disc drives where only positive power supply voltages are normally available. The following application circuit shows the ADG507A connected as an 8-channel differential multiplexer in an automotive, data acquisition application circuit.
The AD7580 is a 10-bit successive approximation ADC, which has an on-chip sample-hold amplifier and provides a conversion result in 20 s. The ADC has differential analog inputs and is configured in the application circuit for a span of 2.5 V over a common-mode range 0 V to + 5 V. Wider common-mode ranges can be accommodated. See the AD7579/AD7580 data sheet for more details. The complete system operates from +12 V (+10%) and +5 V supplies. The analog input signals to the ADG507A contain information such as temperature, pressure, speed etc.
Figure 7. ADG507A in a Single Supply Automotive Data Acquisition Application
REV. C
-7-
ADG506A/ADG507A
TERMINOLOGY
tOFF (EN) tTRANSITION
RON RON Match RON Drift IS (OFF) ID (OFF) ID (ON) VS (VD) CS (OFF) CD (OFF) CIN tON (EN)
Ohmic resistance between terminals D and S Difference between the RON of any two channels Change in RON versus temperature Source terminal leakage current when the switch is off Drain terminal leakage current when the switch is off Leakage current that flows from the closed switch into the body Analog voltage on terminal S or D Channel input capacitance for "OFF" condition Channel output capacitance for "OFF" condition Digital input capacitance Delay time between the 50% and 90% points of the digital input and switch "ON" condition
VINL VINH IINL (IINH) VDD VSS IDD ISS
OUTLINE DIMENSIONS
Dimensions shown in inches and (mm).
28-Lead Plastic DIP (Suffix N)
0.550 (13.97) 0.53 (13.47)
28-Lead Cerdip (Suffix Q)
1.490 (37.84) MAX
0.525 (13.33) 0.515 (13.08) 1.45(36.83) 1.44 (36.58) 0.2 (5.08) MAX 0.012 (0.305) 0.175 (4.45) 0.008 (0.203) 0.12 (3.05) 15 0 0.11 (2.79) 0.099 (2.28) 0.02 (0.5) 0.016 (0.406) 15 0 0.606 (15.4) 0.594 (15.09) 0.16 (4.07) 0.14 (3.56) 0.22 (5.59) GLASS MAX SEALANT 0.06 (1.52) 0.05 (1.27) 0.125 (3.175) MIN 0.18(4.57) MAX
0.62 (15.74) 0.59 (14.93)
0.065 (1.66) 0.045 (1.15)
0.020 (0.508) 0.105 (2.67) 0.015 (0.381) 0.095 (2.42)
0.012 (0.305) 0.008 (0.203)
LEAD NO. 1 IDENTIFIED BY DOT OR NOTCH LEADS ARE SOLDER OR TIN PLATED KOVAR OR ALLOY 42
LEAD NO. 1 IDENTIFIED BY DOT OR NOTCH LEADS ARE SOLDER OR TIN PLATED KOVAR OR ALLOY 42
28-Lead SOIC (Suffix R)
0.7125 (18.10) 0.6969 (17.70)
28 15
28-Lead TSSOP (Suffix RU)
0.386 (9.80) 0.378 (9.60)
28
15
0.177 (4.50) 0.169 (4.30)
0.4193 (10.65) 0.3937 (10.00)
0.2992 (7.60) 0.2914 (7.40)
1
14
1
14
PIN 1
0.1043 (2.65) 0.0926 (2.35)
0.0291 (0.74) x 45 0.0098 (0.25)
PIN 1 0.006 (0.15) 0.002 (0.05)
0.256 (6.50) 0.246 (6.25)
0.0118 (0.30) 0.0040 (0.10)
0.0500 (1.27) BSC
8 0.0500 (1.27) 0.0192 (0.49) 0 0.0157 (0.40) SEATING 0.0125 (0.32) 0.0138 (0.35) PLANE 0.0091 (0.23)
SEATING PLANE
0.0256 (0.65) 0.0118 (0.30) BSC 0.0075 (0.19)
8 0
0.0079 (0.20) 0.0035 (0.090)
0.028 (0.70) 0.020 (0.50)
28-Terminal Plastic Leaded Chip Carrier (Suffix P)
4 5 PIN 1 IDENTIFIER 26 25
28-Terminal Leadless Ceramic Chip Carrier (Suffix E)
0.100 (2.54) 0.064 (1.63) 0.095 (2.41) 0.075 (1.90) 0.011 (0.28) 0.007 (0.18) R TYP 0.075 (1.91) REF 0.075 (1.91) REF
26 2 5
TOP VIEW
(PINS DOWN) 11 12 19 18
0.050 0.005 01.27 0.13 0.021 (0.533) 0.430 (10.5) 0.013 (0.331) 0.390 (9.9) 0.032 (0.812) 0.026 (0.661) 0.120 (3.04) 0.090 (2.29) 0.180 (4.51) 0.165 (4.20)
0.300 (7.62) BSC 0.150 (3.51) BSC
4 28 1 5
0.015 (0.38) MIN 0.028 (0.71) 0.022 (0.56) 0.050 (1.27) BSC 45 TYP
0.456 (11.582) 0.450 (11.430) SQ 0.498 (12.57) SQ 0.485 (12.32)
0.458 (11.63) 0.442 (11.23) 0.458 SQ (11.63) MAX SQ
BOTTOM VIEW
19 18 12 11
0.088 (2.24) 0.054 (1.37)
0.055 (1.40) 0.045 (1.14)
0.200 (5.08) BSC
-8-
REV. C
PRINTED IN U.S.A.
0.0433 (1.10) MAX
C1150c-0-6/98
tOPEN
Delay time between the 50% and 10% points of the digital input and switch "OFF" condition Delay time between the 50% and 90% points of the digital inputs and switch "ON" condition when switching from one address state to another "OFF" time measured between 50% points of both switches when switching from one address state to another Maximum input voltage for Logic "0" Minimum input voltage for Logic "1" Input current of the digital input Most positive voltage supply Most negative voltage supply Positive supply current Negative supply current


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